We are excited to announce that we have successfully demonstrated the Helix code on Helios – validating our plans for large-scale fault tolerance on real hardware. The demonstrations included a world-record per qubit, per round error rate of 4.6 x 10^-5 — with no post selection. On top of that, we put the pieces together for real fault tolerant operation: memory, Clifford gates, and even a heterogeneous code architecture that allows us to use the best code for the job; optimizing for gates and magic state production separately. This demonstration goes beyond component- or primitive- level functionality. The Helix code is a full QEC architecturethat will get us to the targets on our roadmap. Read more in our blogpost here: ↧ Helix: A New Architecture for Enterprise-Scale Fault-Tolerant Quant... Quantinuum has taken a major step towards validating our plans for large-scale fault tolerance by demonstrating the Helix quantum error correction architecture on real hardware